Raj Parihar, PhD

(*** I have graduated and no longer maintain this page.)

PhD Candidate, Graduate Research Assistant
Advanced Computer Architecture Lab (ACAL)
Dept. of Electrical & Computer Engineering
University of Rochester, Rochester, NY - 14627

Email: parihar[@]ece[.]rochester[.]edu
Phone: +1(585)752-1706

*South Lake Tahoe, CA

About Me

I am used to be a PhD candidate in the department of Electrical & Computer Engineering at University of Rochester, Rochester, NY. I successfully defended my thesis on "Accelerating Decoupled Look-ahead to Exploit Implicit Parallelism" (presentation) in July, 2016. My advisor is Prof. Michael C. Huang. I obtained a Masters degree in ECE at University of Rochester in May, 2010. I graduated with a bachelor degree in Electrical & Electronics Engineering (EEE) from Birla Institute of Technology & Science, Pilani in 2006.

Area of Interests

Current Projects

List of Publications, and Talks

Industry/Research Experience

Teaching Assistantships


Class presentations, reports and short term papers in architecture and circuit courses are here.

Short courses in architecture and related class material is here.

Want to migrate to SPEC CPU 2006. Follow the link to my article.

Brief description and runtime informaion of SPEC CPU, PARSEC and SPLASH benchmarks.

Tired of power point; Try LaTeX to create more than useful presentation. Template 1, Template 2, Template 3, Template 4.

Some simple code base to implement generic structures. Sample codes are here.

Some interesting quotes. Few technical advices. Some random articles.

Copyright: Raj Parihar, prince.parihar@gmail.com