SORA Project

People:Bora Karaoglu, Surjya Ray, Michael Nolan, JoHannah Kohl and Wendi Heinzelman


Figure 1: Radio control board provides a high-speed PCIe interface to host PC
Project overview: We have developed TRACE, a family of cross-layer protocols for efficient multicast and broadcast transmission of real-time data in a dynamic ad-hoc network. However, all of our results are based on software simulations. The goal of this project is to implement a framework for TRACE protocols in software radio SORA, which will let us test the performance of the protocols under real-life scenarios.

In conventional wireless communication systems, the physical layer (PHY) and medium access control (MAC) processing is typically implemented in Application Specific Integrated Circuits (ASIC) chips, due to the high-computational and real-time requirements. ASIC chip designing is costly, both economically and time-wise. Also, it cannot be changed or upgraded once it has been fabricated as the design makes it fixed. The lack of flexibility and programmability of ASIC chips makes experimental research in wireless communication become very difficult.

The existing software radio platforms are based on either programmable hardware, such as field programmable gate arrays (FPGAs), or embedded digital signal processors (DSPs). These require programming FPGAs and specialized. Developers have to learn how to program each particular embedded architecture.

Figure 2: A Sora Radio Control Board with RF frontend attached to a PCIe slot in a PC
The wireless and networking research group in Microsoft Research Asia in Beijing is developing a new high-performance wireless platform purely based on software running on commodity PC. The platform, called Sora, provides a simple and convenient way for experimenting with wireless technologies. It does not require the knowledge of FPGA or embedded architecture. Instead, developers program using simple C/C++. With Sora, developers can implement and experiment with high-speed wireless protocol stacks such as IEEE 802.11a/b/g by using commodity general-purpose PCs.

In this project, we use Sora hardware to set up a framework for developing the family of TRACE protocols. We have so far used Network Simulator to simulate TRACE. However, real-life networks offer much more challenges such as clock-drift, synchronization, imperfect physical layers etc. that we do not account for properly in simulations. The goal of this project is to test the family of TRACE protocols with real hardware implementation.